The present disclosure relates to a three-dimensional (3D) semiconductor devices and methods for fabricating the same.
Three-dimensional integrated circuit (3D-IC) memory technology is a promise toward higher level of memory capacity, and covers various ways related to a three-dimensional arrangement of memory cells. The memory capacity can be increased by pattern miniaturization technology or multi level cell (MLC) technology as well as 3D-IC memory technology. However, because pattern miniaturization technology may require higher fabrication costs and MLC technology is restricted in increasing bits per unit cell, the 3D-IC memory technology may be used for increasing memory capacity. Pattern miniaturization and MLC technologies may be independently developed because memory capacity can be further increased by incorporating these technologies into 3D-IC technology.
A punch-and-plug technology, which includes forming multilayered films on a substrate and then forming a plug through the multilayered films, has been suggested as one of the 3D-IC technologies. Punch-and-plug technology has lately attracted considerable attention because it enables a retrenchment of process steps and manufacturing cost. Especially, even if a layer number of the multilayered films increases, punch-and-plug technology makes it possible to realize a higher memory capacity without a significant increase of manufacturing cost. For all that, if a thickness of the multilayered films increases, it may be difficult to form a hole penetrating the multilayered films and a plug filling the hole.